Since Hyve’s inception, in 2011, we have grown alongside the hyperscale market. Working with great partners and brands, we are taking some time to take a walk through how the basic technology has, and continues, to evolve.
As compute, storage & connectivity are the three legs of all digital infrastructures, hear executives from the technology leaders in each of those key areas as we capture where we are and how we got here, as well as what is in store in the future.
PLEASE JOIN US AS OUR VP OF TECHNOLOGY, JAY SHENOY, SPEAKS WITH:
Greg Ernst, VP/GM of US SMG, Intel
Jeremy Werner, CVP & GM, Storage BU, Micron
Jas Tremblay, VP/GM of Data Center Solutions, Broadcom
Have a question for a panelist, a question in general?
Email us at HyveMarketing@HyveSolutions.com
THEMES INCLUDE
Hyperscalers gather a lot of media attention. In one respect, though, hyperscalers are the media — the physical storage media underlying the great masses of content distributed to a global viewership. Keeping pace with hyperscale storage needs is challenging, but providers must make it look easy. What is the behind-the-scenes compute reality for the hyperscalers driving today’s market?
With exabyte-level capacity needs scaling into zettabytes, hard drives are growing to meet this demand. But have SSDs become part of this mass-scale trend? If so, what role have hyperscalers played on the customer side in making that transition? What are the major storage connectivity technologies for data centers, and where do they now stand?
Not least of all, given modern challenges with Moore’s Law, how will the NAND industry remain strong given that it was supposed hit a scaling ceiling five years ago?
One of the hyperscale laptop stickers says ‘My other computer is a datacenter.’ This is basically a connectivity assertion, so how should we think about this?
The Evolution of Hyperscale is exciting – now that you’ve learned where we’ve been, time to see where we are headed! Check out the future of Hyperscale with Micron’s 176-layer NAND, boasting state-of-the-art replacement gate architecture, enabling 35% improved read and write latency for the toughest workloads.
